| 摘要 |
PURPOSE:To assemble an external pull in circuit with one PLL circuit even at the time of high-density picture output and standard picture output by providing a selector which outputs either of an output of about 31.468 KHz from a PLL device and an output of about 15.734 KHz obtained by dividing its frequency by two. CONSTITUTION:When a high density picture is outputted, a switching signal '1' is inputted. The signal of 31.468 KHz outputted by a horizontal synchronizing counter 5 is impressed to a phase comparator 10 through a NAND circuit 15 and an OR circuit 18 and its phase is compared with that of an external synchronizing signal is pull in. When a standard picture is outputted, a switching signal '0' is inputted. The horizontal synchronizing signal of 15.734 KHz obtained by dividing the output of the counter 5 by two through a 1/2 frequency dividing circuit 2 is impressed to the phase comparator 10 through the OR circuit 18 and its phase is compared with that of the external synchronizing signal of the standard picture to pull in. |
