发明名称 DATA PROCESSOR
摘要 PURPOSE:To deliver a control between modules by providing a means for switching an addressing mode and saving and recovering a register according to a control table for respectively holding the of the module and the address of a return. CONSTITUTION:According to the mismatch in the register length of the register A60 and the control register A10, a register saving circuit area in the module A40 cannot be used in the module B50. Therefore, the addressing mode in an entry 21 is set to status information 31 on a program status word E-PSW30 from an attribute B22. Similarly, the return address A81 from the module B50 is set to an entry 87 on the return table 80 instructed by the control register B11 and an entry number is set to the register B70. In such a way, a control can be shifted to the module B50 outside of the addressing from the module A40 of the 31 bit addressing mode.
申请公布号 JPS63174145(A) 申请公布日期 1988.07.18
申请号 JP19870004828 申请日期 1987.01.14
申请人 HITACHI LTD 发明人 TAKAHASHI KIKUO;KAGIMASA TOYOHIKO;MATSUDA YOSHIKI
分类号 G06F12/02;G06F9/34;G06F12/06 主分类号 G06F12/02
代理机构 代理人
主权项
地址