发明名称 INSPECTING DEVICE FOR SEMICONDUCTOR LOGIC CIRCUIT
摘要 PURPOSE:To easily obtain an output with which a semiconductor logic circuit can be inspected by providing a reference level signal generating circuit which can uses >=4 reference level signals having different levels at the same time. CONSTITUTION:For example, N=4 reference level signal generating circuits E1-E4 are provided and plural, i.e. four reference signals V1-V4 which have mutually different levels at the same time are used. Further, inspecting circuits D1-D4 are provided. A semiconductor logic circuit B is therefore a semiconductor inverter circuit and when a signal generating circuit 1 for inspection generates a signal S1 for inspection which varies from a high-level VIH state to a low level VIL state, a reference level signal having the same level is only generated. Consequently, reference level signals which have different levels need not generated in a section where the signal S1 for inspection is at the high level VIH and a section where the signal is at the low level VIH.
申请公布号 JPS63172975(A) 申请公布日期 1988.07.16
申请号 JP19870003456 申请日期 1987.01.10
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 NARUMI NAOAKI
分类号 H01L21/66;G01R31/28;G06F11/22 主分类号 H01L21/66
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