发明名称 INTEGRATED CIRCUIT AND MANUFACTURE THEREOF
摘要 PURPOSE:To reduce leaking of signals even if wires are brought to close or intersected, by constituting parts of signal wires or wires for DC bypasses with metal covered wires, in which the central conductors are surrounded with conductive walls. CONSTITUTION:A bottom surface conductor Ai wall 1, which is a first wiring conductor layer, is formed on a silicon substrate 2. A dielectric layer 3a made of polyimide and the like, which is a first dielectric layer, is formed. An input signal wire ILi, which is a second wiring conductor layer, is formed thereon. Then a second dielectric layer 3b is formed. The layers 3a and 3b are wrapped with a conductive wall Ai 2 for the side surface and the upper surface, which is third wiring conductor layer. The walls Ai 1 and Ai 2 are electrically coupled. An insulating dielectric layer 3c and an output signal wire OLj are formed on the substrate 2. The conductive walls Ai, a dielectric layer 3e and the input signal wire ILi are formed on the output signal wire OLj so as to hold a dielectric layer 3d. Most of signal energy flowing through the signal wire ILi is transmitted through a region surrounded by the walls Ai. Therefore electromagnetic coupling between the input signal wire ILi and the output signal wire OLj can be reduced to a large extent.
申请公布号 JPS63172447(A) 申请公布日期 1988.07.16
申请号 JP19870003274 申请日期 1987.01.12
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 ARAKI KATSUHIKO;KATO HARUHIKO;YAMAMOTO EIICHI
分类号 H05K9/00;H01L21/3205;H01L21/768;H01L23/52;H01L23/522 主分类号 H05K9/00
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