发明名称 VERTICAL MOS TRANSISTOR
摘要 PURPOSE:To make the leading part of VG-IDS characteristics sharp, by setting impurity concentration distribution in a well layer in the manner in which impurity concentration in a specified domain on the side in contact with a source region in a channel region is made uniform. CONSTITUTION:A P-type well region 21 is formed on an N-type semiconductor substrate 1, and a gate oxide film 22, and a gate electrode 23 are formed in order on the N-type semiconductor substrate 1. A part of the P-type well region 21 in contact with the gate oxide film 22, that is, a surface region shown by a line A-A' is made a channel region 24. The impurity concentration distribution in the P-type well region 21 is constant in a shadowed region, and decreases exponentially from the end-portion of the region 25 toward the N-type semiconductor substrate 1 in the transversal direction. Accordingly, the concentration distribution in the channel region 24, too, is constant in the most part, and decreases exponentially from the end-portion of the region 25 toward the N-type semiconductor substrate 1 in the transversal direction.
申请公布号 JPS63173372(A) 申请公布日期 1988.07.16
申请号 JP19870005664 申请日期 1987.01.13
申请人 NISSAN MOTOR CO LTD 发明人 HOSHINO SHIGEO;YAO TAKEYUKI;KURAISON TORONNAMUCHIYAI
分类号 H01L21/336;H01L29/10;H01L29/78 主分类号 H01L21/336
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