SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PURPOSE:To obtain a semiconductor integrated circuit device which can inhibit the double writing of an RM which can be rewritten by providing a writing limiting circuit which recceives the output signal of a memory element and inhibits the writing to the rewritable RM as well as said memory element. CONSTITUTION:An FAMOS transistor (TR)Q11 which is similar to a memory cell is provided to inhibit the double writing. The signal to be supplied to the gate of the TRQ11 is automatically produced by detecting a control signal given from outside or its final writing address signal when the writing of information is through with a memory array MARY. The threshold voltage of the TRQ11 is set at a high level. The generation of a writing control signal C1 is inhibited although the writing is carried out mistakenly to an EPROM with which the writing is through. This is due to the fact that the TRQ11 is turned off with its drain output set at a high level and therefore a signal C3 passed through an inverter IV is set at a low level. The TRQ11 is on with the first writing, and its drain output is set at a low level. Therefore the signal C3 is set at a high level, and a control circuit CONT receives the signal C3 and performs writing.