发明名称 FRAME SYNCHRONIZING METHOD
摘要 PURPOSE:To restore synchronism by means of manual control by detecting errors as for one-frame length of data respectively while shifting frame timings one by one bit to obtain correct frame position. CONSTITUTION:One-frame length of input data 1 is stored in a register 3, and an error detection circuit 4 detects errors from this stored data. The result of this detection is used by counters 5 in a number corresponding to the counting number of a frequency division circuit 8 that generates frame clock for the accumulative counter 5 to count the number of times of errors. The results of these countings are decided at every number of times determined by the frequency division circuit 9, and displayed on a display circuit 6. At the accumulative counters 5, only counters corresponding to time-positions segmented by a correct timing, become smaller than others. Therefore, by observing the LED display, how many bit a frame clock is shifted from inputs can be known. As a result, the synchronism can be restored when only the necessary number of bits are shifted in a necessary direction.
申请公布号 JPS63169144(A) 申请公布日期 1988.07.13
申请号 JP19870000196 申请日期 1987.01.06
申请人 KOKUSAI ELECTRIC CO LTD 发明人 NARUSE OSAMU
分类号 H04J3/06;H04L7/02;H04L7/08 主分类号 H04J3/06
代理机构 代理人
主权项
地址
您可能感兴趣的专利