发明名称 FORMING METHOD FOR MULTILAYER INTERCONNECTION
摘要 PURPOSE:To prevent an interlayer short-circuit due to a hillock by treating a semiconductor substrate in an oxidative atmosphere before a through hole is opened to insulate the hillock part of a first wiring layer penetrated through an interlayer insulating film. CONSTITUTION:After an aluminum wiring pattern 2 of first layer wirings is formed on a semiconductor substrate 1, an interlayer insulating film 3 is formed on the whole substrate 1 by flattening the surface. When the substrate 1 is treated in an oxidative atmosphere, aluminum of a hillock 4 part penetrated through the film 3 is changed to aluminum oxide, and the hillock 4 becomes an insulated hillock 5. Then, through holes 6 are opened at necessary positions of the film 3, a second layer wiring pattern 7 connected to the pattern 2 is formed by the holes 6 on the film 3 as a multilayer interconnection structure. Thus, an interlayer short-circuit due to the hillock can be prevented.
申请公布号 JPS63169046(A) 申请公布日期 1988.07.13
申请号 JP19870000583 申请日期 1987.01.07
申请人 OKI ELECTRIC IND CO LTD 发明人 NAKABO YASUSHI
分类号 H01L23/52;H01L21/3205;H01L21/768;H01L23/522 主分类号 H01L23/52
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