| 摘要 |
PURPOSE:To prevent the runaway caused by a fault of a CPU, by receiving each clear signal outputted continuously, by a deciding circuit, when plural CPUs are normal, and outputting a stop signal to all CPUs, when said signal is not received even one. CONSTITUTION:While CPUs 1, 2 are operating normally, each clear pulse signal is outputted continuously. The clear pulse signals are inputted to the first and the second deciding circuits 7, 8, respectively, and one shot timers 3, 5 output a square wave signal, respectively. Counters 4, 6 always count a clock signal of a clock OSC 11, each of them is cleared to zero by outputs of the timers 3, 5, and counting is started again. When the count value reaches a value determined in advance, the counters 4, 6 output a stop signal for stopping the CPU. These outputs are inputted to an FF 10 through an OR circuit 9, and if the stop signal is received even one, a reset signal is inputted to a reset terminal RS of the CPUs 1, 2 and all CPUs are stopped. |
