| 摘要 |
PURPOSE:To efficiently execute a data transfer by understanding a size of an idle area of a large capacity buffer, based on a signal outputted from each sub-FIFO buffer, and comparing it with a size of a transfer data. CONSTITUTION:Whether a data is written the corresponding sub-FIFO buffers 13a-13n or not is stored in each latching circuit 14a-14n of a storage part 14. At the time of writing a picture drawing data to the FIFO buffer 13, the first processor unit 11 understands a size of an idle area of the FIFO buffer 13 by referring to a set/reset state of each latching circuit 14a, 14n. Thereafter, the unit 11 compares said data with a picture drawing data quantity Q to be transferred, and if Q is smaller, the data is written in the buffer 13. If Q is larger, the data is not written, and written in the buffer 13 after executing said decision by the next time slot in the prevent level. By keeping pace with said processing, a display processor 12 reads the data from the buffer 13 and executes a prescribed display processing.
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