发明名称 PSEUDO SENSOR OUTPUT GENERATING CIRCUIT
摘要 PURPOSE:To put a high-order logic circuit, etc., in normal operation and to recover a fault without stopping a conveyance system by generating a passage false signal if the fault occurs to some of plural article passage detection sensors. CONSTITUTION:Four sensors A-D are arranged longitudinally along an article conveyance path. Passage signals (a)-(d) are inputted to a four-input selector 11. The selecting operations for the 4-input selector 11 and four two-input selectors 14-17 are controlled according to a selection command received from the central processing unit of a host device according to the fault generation states of the sensors A-D. At this time, if the sensor C, for example, becomes faulty, the passage signal of its front stage is outputted as an output beta to the two-input selector 15 and passed through the selector 11 to becomes an input (e) to a variable delay circuit 12, thereby outputting a false signal e'. Consequently, the normal operation of a logic circuit can be carried on, so the fault can be recovered without stopping the conveyance system.
申请公布号 JPS63167291(A) 申请公布日期 1988.07.11
申请号 JP19860312882 申请日期 1986.12.27
申请人 NEC CORP 发明人 URANO ICHIRO
分类号 G01P13/00;G01V8/10 主分类号 G01P13/00
代理机构 代理人
主权项
地址