PHASE LOCKING LOOP

摘要

A phase-lock loop includes a tristate phase detector, a filter and a voltage-controlled oscillator connected in a loop for regenerating clock signals in response to a sequence of data signals applied to the input terminal of the tristate phase detector and the loop. The tristate phase detector opens its output lead whenever a zero is applied to the input terminal of the loop. A resistor is interposed between the tristate phase detector and the loop filter to clamp excursions of a control signal, causing the filter to produce a consistent tuning control signal and forcing the voltage-controlled oscillator to oscillate at a frequency within a preselected frequency range independent of the ones density in the digital sequence applied to the input terminal of the loop.