发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To magnify the action margin of a memory cell by setting a counter generating address input data to a counter generating the Gray codes of specified bits. CONSTITUTION:In a memory RAM having m-piece (four pieces in this figure) address input terminals A1-A4, and the counter CNTR generating address input data of (n) bits (four bits in this figure) which are inputted to the terminals, the CNTR is set to the counter generating the Gray code of (n) bits (four in this figure). The CNTR consists of JK flip-flops FF1-FF4 and exclusive OR gates G1-G3, and it is synchronized with clock signals CLK so as to sequentially output the Gray codes of four bits to O1-O4. Generally, (m) is a positive integer, and (n) is to a positive integer which satisfies n<=m. Thus, the action margin of the memory cell can be magnified.
申请公布号 JPS63167496(A) 申请公布日期 1988.07.11
申请号 JP19860313129 申请日期 1986.12.29
申请人 HITACHI LTD;HITACHI DEVICE ENG CO LTD 发明人 NANBU HIROAKI;YAMAGUCHI KUNIHIKO;KANETANI KAZUO;OHATA KENICHI
分类号 G11C11/413;G11C8/00;G11C8/04;G11C11/34;G11C11/408;H01L27/10 主分类号 G11C11/413
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