| 摘要 |
PURPOSE:To stabilize an output by constituting a PLL circuit with shortening an analogue memory circuit when data needs not to be transmitted, opening a PLL circuit, and adding an output which an analogue memory circuit has held to a binary data signal inputted to a voltage control oscillator when data is transmitted. CONSTITUTION:A memory pulse for switching transmission/reception from a CPU in a transmission equipment mainbody for a modulator is inputted to the analogue switch memory circuit 4, and it is shortened at the time of reception, namely, when data needs not to be transmitted. What is called the PLL (phase lock loop) circuit consists of the voltage control oscillator VCO 1, a frequency divider 2 and a phase comparator 3. At the time of transmission, namely, when data is transmitted, the PLL circuit is opened. and the output (voltage) which the analogue switch memory circuit 4 has held is added to the binary data signal inputted to the VCO 1. High stability against temperature change can be realized, and the output frequency of the VCO can be increased.
|
