| 摘要 |
PURPOSE:To miniaturize the gate circuit giving a hysteresis characteristic to a response discriminating characteristic with respect to an input signal by connecting an auxiliary transistor (TR) selectively in parallel with a selected TR in two TRs depending on an output level of an inverter circuit. CONSTITUTION:Either an auxiliary P-channel TR20 or an auxiliary N-channel TR21 is connected in parallel selectively with corresponding TRs (12, 13) of a 1st inverter circuit 14 depending on an output level from a 2nd inverter circuit 15. That is, the output from the 1st inverter circuit 14 depending on the input signal is inputted to the 2nd inverter circuit 15 and either a 1st switching element 18 or a 2nd switching element 19 is turned on depending on the output level from the 2nd inverter circuit 15. As a result, another TR is connected in parallel with a TR corresponding to a switch element turned on and the level discrimination value of the 1st inverter circuit 14 with respect to the input signal is switched by the output level of the 2nd inverter circuit 15 to constitute the gate circuit with a hysteresis characteristic.
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