| 摘要 |
PURPOSE:To trace the input frequency change even with small circuit scale by providing a phase comparator outputting a phase difference signal between an input signal and a clock, a loop filter and a programmable counter frequency- dividing a master clock at the frequency division number and outputting the clock. CONSTITUTION:For example, suppose that the phase comparator 1 outputs a phase difference signal, as phase delay-1 with respect to the input signal. Suppose that 7, 8 are selected as two kinds of frequency division numbers and they are outputted from the loop filter 2 at each n/2 alternately as the frequency control signal during n-clock by an n-ary counter 24, then the frequency of output of the frequency division number 7 is n/2+1 times and the output fre quency of the number 8 is n/2-1 through the revision when the phase difference signal is inputted to the loop filter 2. Thus, the average frequency of the clock outputted from the programmable counter 3 is increased by nearly 1/7.5n and approaches the input signal frequency. Thus, in selecting the value (n) properly, the division of the frequency is decreased as less as possible.
|
