摘要 |
PURPOSE:To prevent the oscillation to be caused by a limit cycle by providing a rounding means making an output of a multiplier circuit equal to have the same effective digits to those of the output of a delay circuit and allowing the rounding means to avoid rounding zero when a difference signal is not zero. CONSTITUTION:The rounding circuit 11 is a circuit rounding the difference signal being a twice value obtained from a multiplier circuit in the state of absolute value and when the absolute value of the input of the rounding circuit 11 is a minimum identification value of the delay circuit 8, the minimum identification value is outputted in the state of the absolute value, that is, the absolute value round-up is executed. An arithmetic circuit 12 is a circuit to correct a difference signal from the circuit 11 into a retarded output signal from the delay circuit 8, gives its output to an output terminal 7 and leads it to the delay circuit 8. The rounding by the rounding circuit 11 is executed by the truncation of the absolute value or the round-off in the absolute value state.
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