发明名称 CIRCUIT FOR DETECTING READY SIGNAL OF KEYBOARD INTERFACE
摘要 PURPOSE:To surely transmit a data when a host is set at a READY state, by sending the data only when the host is set at the state possible to receive the data in spite of the output timing of a READY signal from the host. CONSTITUTION:In a keyboard interface, an internal signal (BUSY) generated from the READY signal from the host and an output data from the keyboard interface is provided, and only when the host is set at the state possible to receive the data in spite of the output timing of the READY, the data is sent. In other words, a flip-flop 24 generates the internal signal called as the BUSY, and also, the host 12 sends the signal READY which represents that it is the state possible to receive the data inputted from a keyboard 11 to the keyboard 11. The BUSY, when the sending the data is started, in other words, a start bit is outputted from a transmission data, becomes active, and when the READY from the host 12 rises, and it goes to NOT READY, it becomes inactive.
申请公布号 JPS63163618(A) 申请公布日期 1988.07.07
申请号 JP19860311121 申请日期 1986.12.26
申请人 RICOH CO LTD 发明人 TAKAMI SHINICHIRO
分类号 G06F3/02 主分类号 G06F3/02
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