发明名称 |
GATE TURN-OFF THYRISTOR |
摘要 |
A gate turn-off thyristor has a first emitter layer having a P+ P- emitter structure which is in contact with an anode electrode and a second emitter layer having an N-type multi-emitter structure which is in contact with cathode electrodes. To reduce power dissipation in the turn-off process, the first emitter layer mainly consists of low impurity concentration regions, and each high impurity concentration region is formed to have a substantially uniform width and to surround the low impurity concentration region formed within a region of the first emitter layer immediately below one of the emitter strips of the second emitter layer. |
申请公布号 |
DE3471831(D1) |
申请公布日期 |
1988.07.07 |
申请号 |
DE19843471831 |
申请日期 |
1984.11.14 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SHINOHE, TAKASHI PATENT DIVISION;ASAKA, MASAYUKI PATENT DIVISION |
分类号 |
H01L29/74;H01L29/08;H01L29/744;(IPC1-7):H01L29/08 |
主分类号 |
H01L29/74 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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