| 摘要 |
PURPOSE:To prevent a system bug due to the occupancy of a bus for a long time from being generated, by providing a function which interrupts an address conversion processing in executing by detecting the bus request signal of a device, and makes a processor having a bus control function release the bus and accept the bus request of the device. CONSTITUTION:When the bus request signal BR is inputted from a direct memory access controller DMAC, a memory managing device MMU detects the bus request of the direct memory access controller DMAC by the bus request signal BR. Furthermore, based on a condition that a bus request acceptance confirming signal BGACK is not asserted, the address conversion processing is interrupted, and also, a halt signal HALT and a bus error signal BERR are negated, a microprocessor MPU accepts the bus request of the direct memory access controller DMAC, and also, the processing relating to the address conversion processing is retired. Therefore, it is possible to eliminate the system bug generated due to the excess of a queuing time over a data holding time.
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