发明名称
摘要 PURPOSE:To eliminate signal components of other stations acted as noise, by generating the signal of other station through the addition and subtraction of a reception signal and its delay signal and eliminating the other station signal from the reception signal with subtraction, through the processing of amplitude so that the square average of the amplitude error of the signal is minimized. CONSTITUTION:An SS signal received to an input terminal 11 of other station signal generating circuit 21 is inputted, a signal delayed corresponding to the chip time length of P-N code is applied to an input terminal 12, addition and subtraction are done with a delay element 15, a difference circuit 17, a sum circuit 16, a switch 18 and a buffer 19, and a signal under a specified condition is outputted from an output terminal 13. The output of the circuit 21 is applied to an amplitude equalizer 36 and the amplitude processing is performed with a multiplier 29, a square device 31, a delay element 33, integrators 30, 32 and an amplifier 34 of variable gain so that the square average of the amplitude error of the signal to the circuit 21 can be minimized. The signal processed for the amplitude is eliminated from the reception signal through subtraction to eliminate the other station signal component acted as noise.
申请公布号 JPS6333817(B2) 申请公布日期 1988.07.07
申请号 JP19810152026 申请日期 1981.09.28
申请人 JUSEISHO DENPA KENKYUSHOCHO 发明人 YOKOYAMA MITSUO
分类号 H04B1/7107;H04J13/00 主分类号 H04B1/7107
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