发明名称 PROCESSOR FOR LOGICAL LANGUAGE
摘要 PURPOSE:To improve the processing efficiency of a program by determining a condition, on which A (or A and B) is not retrieved, if it is dynamically confirmed that the processing of A (or A and B) on this condition results in failure. CONSTITUTION:The titled processor is provided with an operation part 1, a control part 2, a main memory 3, a cache memory 4, an address converting part 5, an interval bus 6, an input/output bus control part 7, a common input/ output bus 8, and a console processor 9. Various input/output devices are connected to the common input/output bus 8. If a logical value is set to a special built-in predicate of input/output or the like (which cannot be completely returned to the state before try by back track), it is dynamically confirmed that the processing of A (or A and B) on the condition results in failure (and special attendant functions of input/output or the like do not exist) to determine this condition where A (or A and B) is not retrieved.
申请公布号 JPS63163536(A) 申请公布日期 1988.07.07
申请号 JP19860311518 申请日期 1986.12.25
申请人 TOSHIBA CORP 发明人 MATSUMOTO NOBU
分类号 G06F9/44 主分类号 G06F9/44
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