| 摘要 |
<p>A semiconductor memory control circuit separates an externally input operation activation signal (CED) from an operation activation signal (CEI) which is transferred inside a memory, and activates (H) the internal operation activation signal (CEI) only for a predetermined period of time (TM). This predetermined period is determined in accordance with the cycle time (refresh cycle) required to achieve refreshment of a memory cell after the external operation activation signal (CEO) is activated (H). Thereafter, even if the external operation activation signal (CEO) is in an activated state (H), the internal operation activation signal (CEI) is inactivated (L). When the internal operation activation signal (CEI) is in the activated state (H) and the external operation activation signal (CEO) is inactivated, the internal operation activation signal (CEI) is inactivated (L), in accordance with activation of the external operation activation signal (CEO).</p> |
