发明名称 Manufacturing method of insulated gate field effect transistor using reflowable sidewall spacers
摘要 With an increase of integration density in an integrated circuit, the channel length of MIS FET becomes shorter and shorter, which causes a hot carrier effect. To solve the problem, the doping profile of source/drain regions and doping amount must be precisely controlled such that a strong electric field is not generated in a transition region from channel to drain. To obtain this objective, the present invention discloses a method, in which reflowed sidewalls of doped silicate glass having a gentle slope are formed on both sides of a gate electrode, and the gate electrode and the sidewalls thus formed are used as a mask for ion implantation. The depth of ion implantation and the doping amount change gradually from the channel region to the drain region avoiding a generation of the strong electric field and thus alleviates the short channel trouble. The present invention has also an effect of obtaining a passivation layer having gentle slope on the surface and avoiding a broken wire trouble of aluminum wiring.
申请公布号 US4755479(A) 申请公布日期 1988.07.05
申请号 US19870010667 申请日期 1987.02.04
申请人 FUJITSU LIMITED 发明人 MIURA, TAKAO
分类号 H01L21/266;H01L21/3105;H01L21/336;H01L29/08;H01L29/78;(IPC1-7):H01L21/223;H01L21/265 主分类号 H01L21/266
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