发明名称 VERTICAL/HORIZONTAL PATTERN DATA CONVERSION CIRCUIT
摘要 PURPOSE:To obtain a simple circuit capable of vertical and horizontal pattern data conversion by selecting prearranged bits from a data string which is read by scan when data is read through scanning of an address for a pattern data storage part in which pattern data is stored. CONSTITUTION:A character address D sent from a data bus 16 is latched by a latch 18 using a character address latch signal A from CPU, and is output to a pattern memory 12. Data read from the pattern memory 12 is selected by bits designated by a bit selecting signal per data string in a single scan. An output of a shift register 14 is latched by a buffer latch 15 as a conversion data H obtained by conversion of data of a pattern memory from a horizontal to a vertical direction. Later, data latched by the buffer latch 15 is read by means of a lead signal C which is entered from CPU via a data bus 16.
申请公布号 JPS63162257(A) 申请公布日期 1988.07.05
申请号 JP19860308715 申请日期 1986.12.26
申请人 CASIO COMPUT CO LTD 发明人 MIYAMOTO KEITA
分类号 G06K15/00;B41J2/485;G06F3/12;G06K15/02;G09G5/24 主分类号 G06K15/00
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