发明名称 LATCH SIGNAL GENERATING CIRCUIT FOR DYNAMIC SENSE AMPLIFIER
摘要 PURPOSE:To improve the operation margin of a sense amplifier by connecting a constant current circuit in series with a starting transistor (TR) so as to make the operation of the constant current circuit independent of the power supply voltage thereby limiting a current absorbed from a latch signal line at starting to a constant value. CONSTITUTION:The 1st TR Q5 whose 1st input/output terminal is connected to a power supply line, whose control terminal is connected to the 1st clock signal line P1, a constant current circuit Q6 with a current control terminal inserted between the 2nd input/output terminal of the 1st TR and the latch signal line S, and the 2nd TR Q7 whose 1st input/output terminal is connected to the latch signal line S, whose 2nd input/output terminal is connected to a power supply line and whose control terminal is connected to the 3rd clock signal line P3, are provided and the 2nd clock signal line P2 is connected to the current control terminal. The depletion MOSFET Q6 is inserted between the source of the enhancement MOSFET Q5 and the latch signal line S and the gate is controlled by using the clock signal P2 so as to allow the titled circuit to be operated stably at a constant current absorbing capability at starting and to reach the high speed operation.
申请公布号 JPS63161591(A) 申请公布日期 1988.07.05
申请号 JP19860315732 申请日期 1986.12.24
申请人 NEC CORP 发明人 TAKESHIMA TOSHIO
分类号 G11C11/409;G11C11/34 主分类号 G11C11/409
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