发明名称 ERROR CORRECTION CIRCUIT
摘要 PURPOSE:To attain error correction in real time with small circuit scale by accessing a storage means in time division and progressing in parallel for the purpose of data writing for correction, data reading and writing corrected data. CONSTITUTION:A RAM 32 to store a reception data is accessed in time division for the purpose of three actions such as data writing to store the reception data into the RAM 32, reading the data from the RAM 32 for the error correc tion and writing the data after correction into the RAM 32. Thus, the error correction processing is progressed in parallel with the data reception and the error correction in real time is applied. Moreover, since no data register for 277-bit to delay nearly one horizontal period is required, the increase in the circuit scale is prevented.
申请公布号 JPS63161729(A) 申请公布日期 1988.07.05
申请号 JP19860307641 申请日期 1986.12.25
申请人 TOSHIBA CORP 发明人 TANABE TOSHIYUKI
分类号 H03M13/00 主分类号 H03M13/00
代理机构 代理人
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