| 摘要 |
PURPOSE:To secure synchronism among multi-processors without occupying a system bus in a multiple processor system by using a MPINT (multiprocessor interruption) line only. CONSTITUTION:A system memory 1 and processors A2-C4 are connected to a system bus 5 and a MPINT line 6 is used to secure synchronism among those processors. The transfer of data carried out among processors as well as the execution of programs are controlled with the signal line (MPINT) using the line 6 used as a trigger. In such a way, a single common line 6 is provided to processors 2-4 together with a means which sets the using right of the line 6. Then the processor acquired the using right of the line 6 via said setting means secures synchronism with its corresponding processor via the line 6. In such a way, the synchronism is secured among processors with no deterioration in performance. |
