发明名称 TIMER CIRCUIT
摘要 PURPOSE:To increase the output of an output transistor and to expand the usage of a timer circuit, by connecting a PUT to both ends of a capacitor, and controlling the energizing state of the PUT by using a time interval varying means. CONSTITUTION:A series circuit consisting of diodes D1 and D2 and a transistor (TR)Q4 is connected to both ends of the capacitor C1, and a switch SW1 is provided at the base of the TRQ4. When the switch SW1 is closed, the TRQ goes to an OFF state, therefore, a circuit is operated in the same way as an ordinary timer circuit, and when it is opened, it follows that the TRQ4 is energized, and the diodes D1 and D2 are connected to the both ends of the capacitor C1. For this reason, voltages at the both ends of the capacitor C are suppressed at around 1.2V that is a forward voltage for the diodes D1 and D2, and the voltage at a point A does not go to the voltage that is (R3+R4)VCC/(R2+R3+R4) at a point G, therefore, the OFF state of the PUTQ1 is held, and the energizing state of the output TRQ3 can be obtained.
申请公布号 JPS63158910(A) 申请公布日期 1988.07.01
申请号 JP19860306804 申请日期 1986.12.23
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 TAKAHASHI MASAGO
分类号 G04F3/00;H03K17/292 主分类号 G04F3/00
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