| 摘要 |
PURPOSE:To accurately detect the vertical synchronization by generating a 2nd detection signal while a 1st detection signal is obtained during the period of production of a pulse signal having a prescribed width and a period nearly corresponding to the period of a vertical synchronizing signal. CONSTITUTION:The vertical synchronizing detection signal Vp fed to an input terminal 26 is fed to a period detection circuit 27, which generates a vertical synchronizing detection signal Vp' but generates no vertical synchronizing detection signal Vp' if the detection signal Vp is missing and fixes a count of an internal counter. When the vertical synchronizing detection signal Vp is obtained newly, the internal counter is reset. Then the vertical synchronizing detection signal Vp' outputted from the period detection circuit 27 and a self-reset signal Rs outputted from the timing generating circuit 24 are ORed by an OR circuit 28 and a vertical counter 23 is reset by the output of the OR circuit 28.
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