发明名称 ANALOG/DIGITAL CONVERTING SYSTEM
摘要 PURPOSE:To limit the number of comparators by A/D-converting a wide part and the narrow part of a level interval by the same form, by using a reference signal to which level interval is unequal, and setting an input/output relation to a prescribed non-linear relation. CONSTITUTION:An analog input A is inputted to one terminal of plural comparators 13. Also, to the other terminal of the comparators 13, connecting points 1, 2-(n) of a ladder resistance 12 consisting of plural resistances connected in series to a constant-current source 11 are connected. A resistance value between each connecting point 1-(n) becomes the multiple of integer such as, for instance, 4R in both the end parts, and R in the center part, and the center part which requires high resolution, and both end parts which cause no trouble, even if the resolution is low are discriminated. In this state, a signal digitized by each comparator 13 is processed by a code comparator 14, and outputted through a ROM 15. In such a way, the ladder resistance is manufactured easily, the number of comparators is curtailed, and the cost of manufacture is reduced.
申请公布号 JPS63157523(A) 申请公布日期 1988.06.30
申请号 JP19860303910 申请日期 1986.12.22
申请人 NIPPON HOSO KYOKAI <NHK> 发明人 NINOMIYA YUICHI;IZUMI YOSHINORI
分类号 H03M1/38 主分类号 H03M1/38
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