| 摘要 |
PURPOSE:To make it possible to perform a very high speed operation of an optoelectronic integrated circuit (OEIC), by arranging a chip, on which photoelectrons are formed, and a chip, on which electronic elements are formed, on the same substrate, providing chip connecting electrodes, which are extened to the side surface of each chip, butting the electrodes, aud electrically connecting the electrodes. CONSTITUTION:A recess part is formed in a light receiving region of a semi-insulating InP (Si-InP) substrate 11 in a PIN photodiode chip. A p<+>-AlInAs layer 12, an n<->-InGaAs layer 13 and an n<+>-InGaAs layer 14 are sequentially formed so that the end surfaces of the layers are exposed in the recess part. The end surface of the p<+>-AlInAs layer 12 is connected to a p-type electrode (Au/Zn/Au) 16 through an opening part formed in an insulating layer (SiN) layer 15. The n<+>-InGaAs layer 14 is connected to an n-type electrode (Au/AuGe) 17. The electrodes 16 and 17 are extended to the end surface of the chip through extended electrodes (AuSn) 18 and 19. In an FET circuit chip, source and drain electrodes 25 and a gate electrode 24 are formed on an n-type region 22 on a substrate 21. The electrode, which is connected to the PIN diode, is extened to the end surface of the chip through an extended electrode 25. Since the chips can be connected in the shortest distance, the very high speed operation can be carried out. |
