发明名称 CENTRAL PROCESSING UNIT
摘要 PURPOSE:To improve performance and reduces a micro instruction string by using the external additional hardware of a processor to execute a part of the micro instruction string which executes a macro instruction. CONSTITUTION:When the instruction address of a macro instruction is inputted to an adapter 5 from a processor 11 through an extended data bus 17, it is sent to a main memory through a main address bus 19 to independently access the memory. Read data is stored in the adapter 5 by a transfer control circuit 4. when the processor 1 fetches the instruction with a micro instruction, the adapter 5 sends one or two designated bytes of the stored macro instruction string to the processor 1. Consequently, since the required macro instruction is read out to the adapter 5 before the processor 1 fetches the instruction, the execution time is shortened and the capacity of CS where the micro instruction string is stored is reduced.
申请公布号 JPS63156232(A) 申请公布日期 1988.06.29
申请号 JP19860302827 申请日期 1986.12.20
申请人 FUJITSU LTD 发明人 YOSHITAKE AKIHIRO;SAKAI TOSHIHIRO;SUDO KIYOSHI
分类号 G06F9/22;G06F9/28;G06F9/38 主分类号 G06F9/22
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