发明名称 FREQUENCY MULTIPLYING CIRCUIT
摘要 PURPOSE:To obtain a desired multiplied wave output and to require no filter for removing an unnecessary frequency component by generating a power multiplying wave string for sequentially increasing a power multiplier for every square from a fundamental wave input, weighting so as to erase a low order power multiplying wave and synthesizing respective power multiplying wave output. CONSTITUTION:A power multiplying wave generating circuit 1, a coefficient circuit 2 and an adder circuit 3 are provided. The power multiplying wave generating circuit 1 executes the operation of a power multiplying with respect to the fundamental wave input. A maximum order is 2n or 2n-1. It respectively generates the power multiplying waves of the multiplier to be increased sequentially for every square. The coefficient circuit 2 weights respectively to the respective power multiplying wave outputs of the power multiplying wave generating circuit 1 to generate an output. The adder circuit 3 synthesizes the respective outputs of the coefficient circuit 2 to generate the output. Thereby, 2n or 2n-$1 multiplied wave as a synthesized output is obtained and a band-pass filter for removing the unnecessary wave component is not required to an output side.
申请公布号 JPS63155906(A) 申请公布日期 1988.06.29
申请号 JP19860303307 申请日期 1986.12.19
申请人 FUJITSU LTD 发明人 GOTO HARUHIKO
分类号 H03B19/00 主分类号 H03B19/00
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