| 摘要 |
PURPOSE:To reduce the area of a storage capacitor in a planar view and to implement the high integration density of a DRAM, by forming the grooves of a trenched capacitor with an element isolating insulating region as a mask, and forming a polycrystalline silicon film, which is to become one electrode of the trenched capacitor on the surrounding wall of the groove. CONSTITUTION:A dielectric region for element isolation (e.g., an insulating film 2 for element isolation) is selectively formed on a semiconductor substrate (e.g., silicon semiconductor substrate 1). With said element isolating insulating region used as a mask, the grooves (e.g., grooves 7) of a trenched capacitor are formed. A polycrystalline silicon film 8, which is to become one electrode of the trenched capacitor is formed on the surrounding wall of each groove. Thus the groove of the trenched capacitor, which is a storage capacitor, can be formed by a method of self-alignment with the dielectric region for element isolation. Even if the dielectric region for element isolating is exposed on the wall surface of each groove on the execution of the self-alignment method, the one electrode of the storage capacitor can be secured as conventionally done because the polycrystalline silicon film is formed on the wall surface. |
