发明名称 ADDRESS SETTING ERROR DETECTING CIRCUIT
摘要 PURPOSE:To perform error detection in a short time without small trouble by storing a current program and a current memory address value when the memory address value of an address generating circuit exceeds the address upper-limit value of a memory which is used currently. CONSTITUTION:The memory address value from the address generating circuit 1 corresponding to program execution is inputted to a comparator 2. The upper- limit address value of the memory which is used currently is inputted from a register 8 to the comparator 2. The comparator 2 compares the address values of the circuit 1 and register 8 with each other and stores the program address value in a shift register 3-1 and the memory address value in the shift register 3-2 when the value of the circuit 1 is larger. For the purpose, the contents of those registers 3-1 and 3-2 are read out to know the program and memory address value when the upper-limit address value of the memory which is used currently is exceeded. Consequently, the error detection is performed in a short time with small trouble.
申请公布号 JPS63156253(A) 申请公布日期 1988.06.29
申请号 JP19860304506 申请日期 1986.12.19
申请人 FUJITSU LTD 发明人 KOBAYASHI NOBORU
分类号 G06F11/28;G06F12/14 主分类号 G06F11/28
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