发明名称 DATA PROCESSOR
摘要 <p>PURPOSE:To facilitate the debug of software by supplying a single comparison result, a combination of plural comparison results, a single comparison result and its history or a combination of plural comparison results and its histories to a break control circuit. CONSTITUTION:When the break subject is equal to an address, an address ADR showing a break point is set on a comparison register CMP in a chip. When an access occurs, the address to receive an access is compared with the value set on the register and the result of this comparison is supplied to a break control circuit BRCNT. The circuit BRCNT monitors the result of comparison and using combination of the monitor results and the history of the comparison result as inputs to decide whether the designated conditions are satisfied or not, that is, a break is produced or not. Thus the complicated break conditions can be designated.</p>
申请公布号 JPS63155336(A) 申请公布日期 1988.06.28
申请号 JP19860301306 申请日期 1986.12.19
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD 发明人 NARITA SUSUMU;HASEGAWA ATSUSHI;MASUDA SATOSHI
分类号 G06F11/28;G06F11/36;G06F15/78 主分类号 G06F11/28
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