MULTI-PROCESSOR SYSTEM

摘要

PURPOSE:To improve the reliability of a multi-processor system by using a decoder and a flip-flop which writes a system program of a CPU having a system program area in a shared memory via another CPU and then outputs a signal to inhibit access given from another CPU to the area where the system program is written. CONSTITUTION:A buffer 2 is turned on when a response signal ACK outputted from a CPU 5 and showing the holding state of a buffer 2 is supplied. Thus a conductive state is secured between a CPU bus 11 and a shared bus 3. A flip-flop 10 is set when a resetting signal RST which resets the CPU 1 and 5 is turned on and outputs an enable signal ENB to a decoder 8. Then the flip-flop 10 is reset when the clear signal CLR received from the CPU 1 is turned on and stops the output of the signal ENB. The decoder 8 outputs a holding signal HOLD when a request signal REQ is inputted and the signal ENB is kept turned off. Then the decoder 8 outputs a selection signal SEL2 in response to the address inputted from a shared bus 3 when the signal ACK is inputted.