发明名称 |
Buffer circuit for minimizing noise in an integrated circuit |
摘要 |
In the buffer circuit for an integrated circuit according to this invention a load MOS transistor and a drive MOS transistor are connected in series between a power source potential node and a ground potential node of the integrated circuit. A constant current circuit means connected in series with a circuit including the load MOS transistor and the drive MOS transistor.
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申请公布号 |
US4754170(A) |
申请公布日期 |
1988.06.28 |
申请号 |
US19870000464 |
申请日期 |
1987.01.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TODA, HARUKI;MIYAWAKI, NAOKAZU;KOINUMA, HIROYUKI |
分类号 |
H03K19/0948;H03K5/02;H03K19/003;H03K19/0944;(IPC1-7):H03K17/16;H03K17/693 |
主分类号 |
H03K19/0948 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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