发明名称 OUTPUT INTERFACE CIRCUIT FOR LOGIC CIRCUIT
摘要 PURPOSE:To prevent a circuit to which a logical output is connected from being affected by the logical output when a power source is removed, by turning ON/OFF a switching circuit corresponding to the high and the low output levels of a logic circuit, and turning it OFF at the time of stopping power supplying. CONSTITUTION:Since the circuit is constituted in such way that the switching circuit 18 is turned off based on the fact that the output of the logic circuit 10 goes to a low level if the output of the circuit 10 is set at l when power is normally supplied from the power source to the logic circuit 10, 1 appears at an output terminal 12. Since the circuit is constituted in such way that the circuit 18 is turned ON if the output of the circuit 10 is set at '0', '0' appears at the terminal 12. At the time of removing the power source, the output of the circuit 10 goes to the low level, thereby, the circuit 18 is turned OFF. There fore, impedance estimated from the terminal 12 offers high impedance. For this reason, it is possible to prevent the circuit even when another logic circuit receiving the power supplying is connected to the terminal 12 from being affected by the circuit 10.
申请公布号 JPS63153918(A) 申请公布日期 1988.06.27
申请号 JP19860302448 申请日期 1986.12.18
申请人 FUJITSU LTD 发明人 TAMURA HISASHI
分类号 H03K19/003 主分类号 H03K19/003
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