| 摘要 |
PURPOSE:To accurately set the drain current of a high voltage N-channel double diffusion transistor, by impressing a low voltage power source on the gate of a low voltage P-channel MOS transistor on a prescribed condition. CONSTITUTION:The gate 12 of the low voltage P-channel MOS transistor (TR)6 is connected to a CMOS logic part, and a low voltage high potential power source voltage or a ground potential is impressed on it on the prescribed condi tion. Since the TR6 is structured in MOS structure not in double diffusion, it is possible to easily vary an ON-resistance to a ratio of channel length and channel width. A current decided mainly by the ON-resistance of the TR6 is permitted to flow on the high voltage N-channel double diffusion TR7 whose gate and drain are short-circuited, and the gate and the drain voltage of the high voltage N-channel double diffusion TR8 are generated. The ratio of the channel length and the channel width of the TR6 decides the drain currents of the TRs 7 and 8 mainly, however, since it is possible to set the ratio of the channel length and the channel width with high accuracy, it is possible also to set the drain current of the TR8 with high accuracy.
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