发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To simplify a transmission line and circuit constitution by generating and transferring a serial data formed by inserting a data pulse between pulse trains of a prescribed period and creating the clock signal from the pulse train at the reception side to demodulate the created data. CONSTITUTION:In transferring data serially between a host computer and its subsequent equipment, data signals B1, B2... are inserted one by one in pulse trains A1, A2... generated at a prescribed period and the result is transferred, then the secondary waveform whose state is changed in a position inserted with the data signal is generated by using the pulse train as a trigger. The secondary signal is used as a clock signal to demodulate a data signal. Thus, the transmission line of the clock signal from the host computer or the clock signal generating circuit at the reception side is not required and the transmission line or the circuit is simplified.
申请公布号 JPS63152240(A) 申请公布日期 1988.06.24
申请号 JP19860301011 申请日期 1986.12.17
申请人 FUJITSU LTD 发明人 ISHIKAWA TETSURO
分类号 H04L7/08 主分类号 H04L7/08
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