| 摘要 |
PURPOSE:To attain the same processing by one DSP having been in need of two DSPs in a conventional circuit by giving two input digital signals to a digital signal processor (DSP) so as to attain accurate output even when the result of processing is replaced into sample clocks at the output side. CONSTITUTION:Sampled clocks (a), (c), (b), (d) of input digital signals A, C and output digital signals B, D being the result of processing have the same frequency and optional phase, then the two input digital signals A, C are inputted to one DSP3, where the input digital signal inputted earlier is processed and the result of processing is outputted. Moreover, even when the output of the processing result is replaced into the sample clocks (b), (d), accurate output is attained. Thus, the processing of two input digital signals is attained by one DSP3.
|
