| 摘要 |
PURPOSE:To accelerate an access time and to attain low power consumption, by providing a sense amplifier consisting of an amplifying MOSFET respectively for complementary data lines constituting a memory array, and a common sense amplifier connected selectively to a pair of complementary data lines in a group. CONSTITUTION:The unit circuit of the sense amplifier SA is provided corresponding to the complementary data line constituting the memory array M-ARY, and the unit circuit of the common sense amplifier CSA is provided at every group setting every four pairs of complementary data lines as one group. And a readout signal of the memory cell to be outputted is amplified at high speed by both a sense amplifier SA circuit corresponding to the complementary data line to which the memory cell is coupled, and a common sense amplifier CSA circuit connected selectively, and the storage information of another memory cell is refreshed only by the sense amplifier SA circuit provided corresponding to respective complementary data line. In such way, it is possible to perform a readout operation at high speed, and to lower the power consumption.
|
