| 摘要 |
PURPOSE:To simplify the interface between circuits and to quicken the multiplex speed and to improve the reliability by providing the function of a control section to each channel interface circuit. CONSTITUTION:The time division multiplexer consists of plural channel interface circuits 11 and plural aggregate interface circuits 12 and no central control circuit exists. An inputted channel signal is multiplexed on its own time slot decided in advance by the channel interface circuit 11 and sent to the aggregate interface circuit 12. The circuit 12 generates a reference signal to multiplex at the circuit 11, feeds the result to the channel interface circuit 11 and supplied an output to an opposed time division multiplexer while receiving the multiplexed signal.
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