摘要 |
PURPOSE:To make it possible to form a multilayer interconnection using a minute wiring pattern, by etching a first insulator film and a first flattening film, which is formed on said film, and forming a second insulator film on the entire surface. CONSTITUTION:A P-SiO2 film 4 as a first insulator film is formed on a substrate 1, on which a first wiring pattern 3 is formed. A resist film 5 is formed so as to fill an irregular part. Then, the P-SiO2 film 4 and the resist film 5 are etched back at about the same etching speed by dry etching and the like. The etching is performed until the resist film 5 disappears. A P-SiO2 film 6 as a second insulator film is formed. A resist film 7 as a second flattening film is formed, and the surface is flattened. Thereafter, the P-SiO2 film 6 and the resist film 7 are etched back until the film 7 disappears at about the same etching speed. Thus the flat P-SiO2 film 6 is obtained. Then, a contact window is formed at a part of the film 6, and an Al wiring pattern 8, which is a second wiring pattern, is formed.
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