发明名称 INSPECTION OF WAFER LSI USING DIELECTRIC INSULATING LAYER STAGE
摘要 PURPOSE:To make it possible to remove external noises, by fixing a thin dielectric insulating layer on the surface of a wafer stage, connecting the wafer stage to the electrode of a power source for an LSI on the grounding side so as to provide a ground potential, and grounding the hamonic noises of elements through the wafer stage. CONSTITUTION:A thin dielectric insulating layer 7 comprising ceramics and the like is fixed on the surface of a metal wafer stage 2. A wafer 1 to be inspected is mounted on the layer 7. The wafer stage 2 is connected to the negative electrode (grounding side) of a power source 4 of the wafer stage 2 through a grounding wiring 8. The positive electrode is grounded depending on the polarity of the LSI. In correspondence with pad terminals 1a, 1b... of the LSI, probing pins 3a, 3b... of a prober 3 are contacted and also connected to the power source 4 and an inspecting device 5. At this time, a capacitor Cp 6 is required for removing noises on the side of the power source 4. Mutual interference of harmonic noises of elements is eliminated by providing the dielectric insulating layer. External noises are removed by grounding the wafer stage, and the wafer can be inspected with the operation of the wafer being kept stable.
申请公布号 JPS63151039(A) 申请公布日期 1988.06.23
申请号 JP19860299657 申请日期 1986.12.16
申请人 HITACHI ELECTRONICS ENG CO LTD 发明人 ISOBE KATSU
分类号 H01L21/66;G01R31/26 主分类号 H01L21/66
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