发明名称 PSEUDO SIGNAL INPUT SYSTEM
摘要 PURPOSE:To facilitate the check of an asynchronous signal processing function of a data processing unit by inputting an asynchronous signal from a signal generating circuit oscillated by a start from the host device. CONSTITUTION:A main microprocessor unit (MPU) 5 designates a mode register 3a to the test mode and an output signal of a pseudo signal register 2a is selected as an asynchronous signal. Moreover, the MPU 5 issues an input/output command to the input/output control section 8a, a main control section 12 controls the data input/output section 13 to apply the input/output operation with the input/output device 9a. Moreover, the MPU 5 turns on/off a prescribed bit of the pseudo signal register 2a at an optional timing in such a state. Thus, the MPU 5 turns on/off the bit of the pseudo signal register 2a independently of the operation of the input/output control section 8a to generate the asynchro nous signal in the optional timing. Thus, the operation of the input/output con trol section 8a in every timing of the asynchronous signal to check the device surely.
申请公布号 JPS63150750(A) 申请公布日期 1988.06.23
申请号 JP19860300439 申请日期 1986.12.16
申请人 FUJITSU LTD 发明人 SUGIMURA YOSHIYASU
分类号 G06F11/22;G06F13/00;G06F13/42 主分类号 G06F11/22
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