发明名称 LOW NOISE AMPLIFIER CIRCUIT
摘要 PURPOSE:To improve the low noise characteristic at a low level and the low distortion characteristic at a high level by providing a gate bias controller controlling a gate bias of a GaAs FET based on the detected value of a reception level detecting circuit. CONSTITUTION:A field effect transistor (GaAs FET) 10 has the IDS-VGS characteristic, for example, as shown in figure, the NF is minimized at a point A of 10-15% of the IDSS in the element as above in the NF (noise figure) best point and the maximum saturated output is obtained at a point B near the IDSS. Thus, a reception level detector 2 detects the reception level in the low noise amplifier 1 by having only to apply a constant drain bias voltage to the GaAs FET 10 through a terminal 13, a gate bias controller 3 is driven based thereupon, a bias is given to a point A at a low reception level and a bias is given to a point B at a high reception level. Thus, the NF deterioration is not caused at a low reception level and a low distortion characteristic is obtained at a high reception level.
申请公布号 JPS63149909(A) 申请公布日期 1988.06.22
申请号 JP19860295736 申请日期 1986.12.13
申请人 NEC CORP 发明人 AIHARA SHIGENOBU
分类号 H03F1/26;H03F1/32;H03G3/30;H04B1/18 主分类号 H03F1/26
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