| 摘要 |
PURPOSE:To reduce the load of a microprocessor with comparatively simple constitution by using a combined unit of a shift register and a pulse counter as an interface between a magnetic card reader and the microprocessor. CONSTITUTION:Serial data 8RDD read out from the magnetic reader 1 are written in the shift register 10 and a clock 7RCP is applied as a reading clock at that time. The clock 7RCP counts up the contents of the counter 4, and when the number equal to the maximum number of bits in the shift register 10 is counted, an interruption signal 11 is sent to the microprocessor 2. Since the microprocessor 2 receives the signal 11 and commands the shift register 10 to read out data, the data in the shift register 10 can be read out as a data signal 12. Since the microprocessor 3, the counter 4 and the shift register 10 are constituted so that the same number of bits are processed in parallel, operation divided at each bit group can be attained.
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